AI-powered design of sustainable secure cryptocircuits
Developing sustainable, secure, and reconfigurable cryptographic circuits powered by artificial intelligence to ensure greater resilience and reliability in electronic systems
Summary
The objectives addressed in this project provide responses to some of the main challenges faced by the semiconductor and electronics industry and ICT ecosystems, which lies in facing both advances in new technologies Beyond CMOS directly applied to hardware cybersecurity. This project advances in this direction by proposing secure, efficient and reliable building blocks of Roots of Trust, key elements in secure and trusty operation in IoT scenarios, through both innovative conventional CMOS and emerging technology solutions.
Project ID: PID2024-158044OB-I00
Start date: 1 October 2025
End date: 30 September 2028
Funder under: Spanish Government
Budget: 222.0612,50€
Coordinated by: Erica Tena-Sánchez / Juan Núñez
Objetives
O1. AI boosted automation and countermeasure inclusion in cryptographic hardware modules
There are two main objectives facing a designer of secure hardware: attack-resistant design and evaluation of security levels. On the one hand, we have the secure design of cryptographic primitives guaranteeing certain levels of security. In this aspect, one of the objectives of GreenCrypt is the automation of the inclusion of countermeasures in cipher and other cryptocircuit implementations that do not have countermeasures against hardware attacks. In order to achieve this goal, different design strategies that are compatible with each other are proposed. Initially, the automated design and inclusion of correlated noise generator modules to obfuscate the power dissipation of the cryptographic module is contemplated, as well as the automatic mapping of the implementation with full-custom dual-precharge logic (DPL) library designs. The automatic inclusion of countermeasures means that pre-silicon designs can be evaluated. This automation of the automatic detection of information leakage points, as well as the automation of the process by means of artificial intelligence are, together with the automatic inclusion of countermeasures, the first objective of this project.
O2. Exploitation of reconfigurability and reusability to create sustainable cryptographic hardwaresolutions that adapt to evolving security threats.
Reconfigurability and reusability are essential for crafting sustainable cryptographic hardware. By leveraging these properties, devices can adapt to evolving security threats dynamically. This approach reduces resource consumption, minimizes e-waste, and ensures long-term viability, aligning with modern needs for secure, flexible, and environmentally friendly hardware solutions in the face of advancing challenges. On one hand, the design of countermeasures to protect cryptographic modules is necessary to achieve the required security levels. Unfortunately, the evolution in the appearance of new threats and updates in cryptographic application standards make necessary what is called as hardware patching. Being able to update the countermeasures included in the cryptographic modules would allow to extend the time of use of the designed circuit, since it would adapt to new threats. On the other hand, the integration of reconfigurable hardware, (i.e., oscillator networks in GreenCrypt) into cryptographic hardware, such as PUFs and TRNGs, seeks to optimize the reuse of combinational logic for dual purposes—cryptographic functionality and processing—using advanced co-design strategies and deep learning-driven variability characterization.
O3. Exploration of innovative approaches for efficient cryptographic circuit design
The evolving security landscape necessitates exploring new cryptographic implementations that leverage the unique properties of emerging technologies and novel design paradigms. Traditional methods often fall short in addressing modern challenges, particularly in resource-constrained environments like IoT and Edge devices. Innovative approaches, such as using coupled oscillator networks and ferroelectric devices for PUFs and TRNGs, exploit intrinsic material properties like variability and phase transitions. These characteristics offer robust entropy sources, enhancing security and unpredictability. Additionally, cycle-specific behaviors and reconfigurability address limitations of traditional device variations, enabling larger challenge-response spaces and greater adaptability. Moreover, these emerging technologies allow for energy-efficient designs, essential for low-power devices, without sacrificing security. By tapping into these advancements, we can develop more secure, scalable, and efficient cryptographic circuits, capable of meeting the demands of modern applications and evolving threats.
About our institutions
This project is being carried out at the Instituto de Microelectrónica de Sevilla (IMSE-CNM), a joint R&D&I center of the Spanish National Research Council (CSIC) and the University of Seville (US).
